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- 4Project Ideas
- Step 6 – SSH or VNC into one of the Mac Pros(running Anka Build). Let’s call this the builder mac. Create your macOS VM iOS build and test iOS environment (Anka VM Templates). Full command line support is available (‘anka create’) and you can fully automate this step (‘anka create’ & ‘anka run’). In this demo, we are creating a VM with 4vCPU, 8GB RAM and all dependencies to.
- A new entry from Open Source utilizing native virtualization. It’s a fast and secure way to run VMs on the Mac. Veertu Desktop is supported on Mac models of early/mid-2011 or later running Yosemite 10.10 or later. Parallels, VM Fusion, VirtualBox, and Veertu can also run other operating systems such as Linux, Unix, OS/2, Solaris, etc.
QEMU is applying for Google Summer of Code 2017. This page contains our ideas list and information for students and mentors. Google Summer of Code is a program that pays students for 12-week full-time remote work on open source projects from May to August!
Students: Google has not published the list of accepted organizations yet. You are welcome to contribute to QEMU and contact mentors for project ideas you are interested in. Please keep in mind that QEMU may not be accepted into GSoC to avoid disappointment.
Oracle VM VirtualBox 6.1.12 Build 139181 Cross-platform, free and general-purpose comprehensive virtualization software for x86 hardware, d. Jul 17th 2020, 09:25 GMT.
After contacting the mentor to discuss the project idea you should fill out the application form at [1]. The form asks for a problem description and outline of how you intend to implement a solution. You will need to do some background research (looking at source code, browsing relevant specifications, etc) in order to form an idea of how to tackle the project. The form asks for an initial 12-week project schedule which you should create by breaking down the project into tasks and estimating how long they will take. The schedule can be adjusted during the summer so don't worry about getting everything right ahead of time.
Candidates may be invited to an IRC interview with the mentor. The interview consists of a 30 minute C coding exercise, followed by technical discussion and a chance to ask questions you have about the project idea, QEMU, and GSoC. The coding exercise is designed to show fluency in C programming.
Here is a C coding exercise we have used in previous years when interviewing students: 2014 coding exercise
Try it and see if you are comfortable enough writing C. We cannot answer questions about the previous coding exercise but hopefully it should be self-explanatory.
If you find the exercise challenging, think about applying to other organizations where you have a stronger technical background and will be more competitive compared with other candidates.
- IRC (GSoC specific): #qemu-gsoc on irc.oftc.net
- IRC (development):
- QEMU: #qemu on irc.oftc.net
- libvirt: #virt on irc.oftc.net
- KVM: #kvm on chat.freenode.net
- Mailing lists:
- QEMU: qemu-devel
- libvirt: libvir-list
- KVM: linux-kvm
Please contact the mentor for the project idea you are interested in. IRC is usually the quickest way to get an answer.
For general questions about QEMU in GSoC, please contact the following people:
- Stefan Hajnoczi (stefanha on IRC)
This is the listing of suggested project ideas. Students are free to suggest their own projects, see #How to propose a custom project idea below.
QEMU audio backend
Summary: Rework QEMU audio backend
The audio backend facilitates audio playback and capture using host audio APIs (CoreAudio, PulseAudio, DirectSound, etc). It is used by emulated soundcards and may need to convert between the audio format supported by the emulated soundcard and the format supported by the physical soundcard. This area of the codebase has been stable for a long time but is now due some significant improvements.
The goal of this summer project is to improve the audio/ backend. The preliminary task is to rebase and merge (some or all) of the GSOC 'audio 5.1 patches 00/51' series which modernizes the audio backend codebase.
Then, add a generic GStreamer audio backend. GStreamer is an open source multimedia framework that is cross-platform and already supports a lot of the functionality that is implemented in QEMU's audio backend.
Autodesk mudbox 2018 1 download free. Finally, try to replace as much of audio/ by custom gstreamer pipelines. This would be a major simplification that reduces the code size significantly, making QEMU's audio backend smaller and easier to maintain.
Links:
Details:
- Skill level: intermediate or advanced
- Language: C
- Mentors: [email protected], [email protected]
- Contact: past gsoc student 'Kővágó Zoltán' <[email protected]>
- Suggested by: [email protected]
Disk Backup Tool
Summary: Write a tool that performs both full and incremental disk backups
QEMU has added command primitives that can be combined to perform both full andincremental disk backups while the virtual machine is running. A full backupcopies the entire contents of the disk. An incremental backup copies onlyregions that have been modified. Orchestrating a multi-disk backup to local orremote storage is non-trivial and there is no example code showing how to do itfrom start to finish.
It would be helpful to have a 'reference implementation' that performs backupsusing QEMU's QMP commands. Backup software and management stack developerswishing to add QEMU backup support could look at this tool's code as anexample. Users who run QEMU directly could us this tool as their backupsoftware.
You need to be able to read C since that's what most of QEMU is written in.This project will expose you to backup and data recovery, as well as developingcommand-line tools in Python.
See the links to familiarize yourself with disk image files, backups, andsnapshots.
Links:
Details:
- Skill level: intermediate
- Language: Python
- Mentors: John Snow <[email protected]> (jsnow on IRC), Stefan Hajnoczi <[email protected]> (stefanha on IRC)
Moving I/O throttling and write notifiers into block filter drivers
Summary: Refactor the block layer so that I/O throttling and write notifiers are implemented as block filter drivers instead of being hardcoded into the core code
QEMU's block layer handles I/O to disk image files and now supports flexibleconfiguration through a 'BlockDriverState graph'. Block drivers can beinserted or removed from the graph to modify how I/O requests are processed.
Block drivers implement read and write functions (among other things).Typically they access a file or network storage but some block drivers performother jobs like data encryption. These block drivers are called 'filter'drivers because they process I/O requests but ultimately forward requests tothe file format and protocol drivers in the leaf nodes of the graph.
I/O throttling (rate-limiting the guest's disk I/O) and write notifiers (usedto implement backup) are currently hardcoded into the block layer's core code.The goal of this project is to extract this functionality into filter driversthat are inserted into the graph only when a feature is needed. This makes theblock layer more modular and reuses the block driver abstraction that isalready present.
This project will expose you to QEMU's block layer. It requires refactoringexisting code for which there is already some test coverage to aid you.
Links:
Details:
- Skill level: intermediate
- Language: C
- Mentor: Kevin Wolf <[email protected]> (kwolf on IRC), Stefan Hajnoczi <[email protected]> (stefanha on IRC), Alberto Garcia (berto on IRC)
PCI Express to PCI bridge
Summary: Code an emulated PCIe-to-PCI bridge for QEMU PCI Express machines
Modern Virtual Machines and their devices are PCI Express, however a means of supportingexisting PCI and PCI-X deployment is required. Some use cases may need using legacyPCI devices that plug into platforms that exclusively support PCI and PCI-X system slots.
QEMU already has a solution, the i82801b11 DMI-to-PCI Bridge Emulation.However, the device has some disadvantages: it cannot be used by ARM guests andit is part of the Root Complex, so it can't be hot-plugged.
The goal of this summer project is to code a generic PCIe-PCI bridge. The bridge should be hot-pluggableinto PCI Express Root Ports and be usable across various architectures and Guest Operating Systems.
Once the bridge is merged upstream, the PCI/PCI Express infrastructurewill be ported to the QOM model to conform with QEMU standards,all that as the time permits.
Links:
Details:
- Skill level: intermediate
- Language: C
- Mentor: [email protected], marcel_a on IRC
- Suggested by: Marcel Apfelbaum <[email protected]>
Add a Hypervisor.framework accelerator
Summary: Add x86 virtualization support on macOS using Hypervisor.framework
QEMU does not yet take advantage of Hypervisor.framework, the API for hypervisors on macOS. Currently one must use the slower TCG just-in-time compiler or the Intel HAXM accelerator module that relies on a third-party driver.
Hypervisor.framework was added to macOS in Yosemite (10.10). It exposes the Intel VMX CPU feature for running guest code safely at native speed. The main difference to the KVM or HAXM APIs is that the Hypervisor.framework user must implement instruction emulation to handle instructions that vmexit due to I/O accesses. Most of the code will be related to this emulator.
QEMU would be able to run x86 virtual machines with much better performance and without relying on third-party drivers thanks to Hypervisor.framework. This will make QEMU more useful on macOS and encourage more contributions from developers on that platform.
This project is an advanced project. You should be familiar with the concept of an emulator. Luckily there is the Linux KVM code as well as other code that implements VMX or Hypervisor.framework to use for inspiration. You will learn about writing the most core part of a hypervisor.
There is an existing QEMU-based Hypervisor.framework implementation in Veertu's hypervisor. This can serve as a reference and one way to approach the project is to take that code and get it merged into QEMU after necessary changes have been made.
Links:
Details:
- Skill level: advanced
- Language: C
- Mentor: Alexander Graf <[email protected]>
Vhost-pci based inter-VM communication extension
Summary: extend the current vhost-pci based inter-VM communication
Existing vhost-pci supports dynamic setup (i.e. the vhost-pci-net device is created and hot-plugged to the VM based on runtime requests) of an asymmetric inter-VM communication channel (i.e. communication between vhost-pci-net and virtio-net). The channel is built by sharing a VM’s entire memory with another VM. This gives rise to good inter-VM communication performance and it is useful for use cases (e.g. Network Function Virtualization) where security is not an important factor.
In the extension work, we enable static setup (i.e. create vhost-pci-net via QEMU booting command line) of a symmetrical inter-VM communication channel (i.e. vhost-pci-net to vhost-pci-net communication). As opposed to sharing the entire VM’s memory, the two VMs share a piece of intermediate memory to transmit network packets.
Links:
- KVM Forum ’16: Design of Vhost-pci (PDF)
Details:
- Skill level: advanced
- Language: C
- Mentor: Wei, Wang <[email protected]>, Yuanhan, Liu <[email protected]>
- Suggested by: Marc-André Lureau <[email protected]>
Python module for Jailhouse
Hyper terminal. Summary: Factor out a Python module for the Jailhouse command &control interface
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The partitioning hypervisor Jailhouse is controlled from a Linux guestsystem (the root cell) via a command line tool (jailhouse). Thistool consists of a small core written in C, providing the minimallyrequired services to operate the hypervisor. For more advanced featureslike configuration file generation or the loading of additional Linuxguests, a set of extension scripts have been written in Python. Thescripts are now at a point where they would benefit from using a'pyjailhouse' module that should implements common functionality onlyonce, e.g. configuration format or system information parsing but alsointeraction with the low-level hypervisor control interface.
The goal of this project is to create such Python module, transferexisting code from the scripts into it, and make sure that the module isboth properly installed and also usable from the source directory. As areuse case and benchmark for a reasonable split-up,
jailhousehardware check
shall be enabled to parse the system configurationitself, instead of relying on a config file previously generated byjailhouse config create
.Bonus (with advanced Python experience): Further refactoring of thesystem configuration parser and config file generator to enable thereuse on non-x86 architectures or for generating and validating non-rootcell configurations.
Links:
Details:
- Skill level: intermediate to advanced
- Language: Python (basic C knowledge helpful)
- Mentors: Jan Kiszka <[email protected]>, Valentine Sinitsyn <[email protected]>
New configuration format for Jailhouse
Summary: Define a new Jailhouse configuration source file formatand implement a compiler for it Translateq 2 0 6 – online translator.
So far, the configuration files for the Jailhouse hypervisor are definedin C by filling structures and array and then translated into theirbinary representation via standard gcc. In order to simplify theerror-prone definition process while keeping the binary output formatunchanged, a new source form shall be developed. That could beYAML-based, but alternatives can be discussed as well.
The requirements on the format are
- human readability (no XML..)
- easily modifiable by humans (e.g. by using symbolic labels for references, instead of array indexes)
- unambitious transformation into binary format
- optional: support for including or referencing common fragments (e.g. device resources initially used by root cell, then transferred to a non-root cell)
- optional: support for grouping of associated resources (e.g. a PCI device with its capabilities and memory regions)
In order to use the format in place of the existing C descriptions, acompiler shall be written (can be in Python, C or a mixture) to generatethe binary representation of the configuration files and hooked into theJailhouse build process. There will surely be a transitional phasebefore the new format is matured and old format can be discontinued.This phase will likely last longer than this project.
Links:
Details:
- Skill level: advanced
- Language: Python, C
- Mentors: Jan Kiszka <[email protected]>, Valentine Sinitsyn <[email protected]>
Vulkan-ize virgl
Summary: accelerated rendering of Vulkan APIs
virgl enables accelerated 3d rendering in a VM. It uses Desktop GL on host, and provides OpenGL/GLES in guest.
This project would aim at implementing Vulkan accelerated rendering. There are multiple ways of interpreting this idea. One interesting approach would be to support Vulkan in VM on a Vulkan-capable host, doing more passthrough.
Links:
Details:
- Skill level: advanced
- Language: C
- Mentors: [email protected], [email protected]
- Suggested by: [email protected]
virgl Windows driver
Summary: accelerated rendering of Windows guests
virgl enables accelerated 3d rendering in a VM. It currently only supports Linux guests.
There is some working prototype of virtio-gpu dod driver already. The goal of this project would be to enable 3d rendering.By working on an OpenGL Installable Client Driver (probably as a first step), and DirectX support (could be worth investigating and using the 'nine' mesa state tracker)
Links:
Details:
- Skill level: advanced
- Language: C
- Mentors: [email protected], [email protected]
- Suggested by: [email protected]
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virgl on Windows host
Summary: make virgl rendering work on Windows host
virgl enables accelerated 3d rendering in a VM. It requires Desktop GL on the host.
In theory, virgl should work on Windows with a capable host driver. This project aim at making virgl work well with various GPU on Windows. Since many Windows OpenGL drivers have bad behaviours, it would be worth to support ANGLE/opengles instead. This would require various modifications in virgl library. Additionally, it would be a good opportunity to ease the cross-compilation and packaging of qemu/virgl with msitools.
Links:
Details:
- Skill level: intermediate or advanced
- Language: C
- Mentors: [email protected], [email protected]
- Suggested by: [email protected]
MTTCG Performance Enhancements
Summary: The MTTCG Project is a projectthat converted the TCG engine from single threadedexecution to multi-threaded execution to take advantage of all cores on amodern processor. With this conversion several performance bottlenecks wereidentified when running strongly ordered guests like x86 on weakly orderedhosts like ARM64. The first part of the project will be to quantify theidentified bottlenecks for TCG performance. Based on this data, you need toprioritize one of the following sub-tasks.
- Measure performance bottlenecks experimentally
- Place TranslationBlock structures into the same memory block as code_gen_buffer
Consider what happens within every TB:
(1) We have one or more references to the TB address, via exit_tb.
For aarch64, this will normally require 2-4 insns.
We would reduce this to one insn, always, if the TB were close by, since theADR instruction has a range of 1MB.
(2) We have zero to two references to a linked TB, via goto_tb.
- Remove the 128MB translation cache size limit on ARM64.
The translation cache size for an ARM64 host is currently limited to 128MB. This limitation is imposed by utilizing a branch instruction whichencodes the jump offset and is limited by the number of bits it can use forthe range of the offset. The performance impact by this limitation is severeand can be observed when you try to run large programs like a browser in theguest. The cache is flushed several times before the browser starts and theperformance is not satisfactory. This limitation can be overcome bygenerating a branch-to-register instruction and utilizing that when thedestination address is outside the range of what can be encoded in currentbranch instruction.
Based on the previous task of placing the translation structures within thecode gen buffer, we can remove this 128 MB cache size limit as follows:
(i) Raise the maximum to 2GB by aligning an instruction pair, adrp+add, tocompute the address; the following insn would branch. The update code wouldwrite a new destination by modifing the adrp+add with a single 64-bit store.
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(ii) Eliminate the maximum altogether by referencing the destination directlyin the TB. This is the !USE_DIRECT_JUMP path. It is normally not used on64-bit targets because computing the full 64-bit address of the TB is harder,or just as hard, as computing the full 64-bit address of the destination.
However, if the TB is nearby, aarch64 can load the address fromTB.jmp_target_addr in one insn, with LDR (literal). This pc-relative load alsohas a 1MB range.
This has the side benefit that it is much quicker to re-link TBs, both in thecomputation of the code for the destination as well as re-flushing the icache.
- Implement an LRU translation block code cache.
In the current mechanism that it is not necessary to know how much code isgoing to be generated for a given set of TCG opcodes. When we reach thehigh-water mark, we flush everything and start over at the beginning of thebuffer. We can improve this situation by not flushing the TBs that wererecently used i.e., by implementing an LRU policy for freeing the blocks.If you manage the cache with an allocator, you'll need to know in advancehow much code is going to be generated. This is going to require that yougenerate position-independent code into an external buffer and copy it intothe code gen buffer after determining the size. We can then implement an LRUpolicy for removing unused blocks and saving the translation cache.
- Avoid consistency overhead for strong memory model guests by generating load-acquire and store-release instructions.
To run a strongly ordered guest on a weakly ordered host using MTTCG, forexample, x86 on ARM64, we have to generate fence instructions for all theguest memory accesses to ensure consistency. The overhead imposed by thesefence instructions is significant (almost 3x when compared to a run withoutfence instructions). ARM64 provides load-acquire and store-releaseinstructions which are sequentially consistent and can be used instead ofgenerating fence instructions. Add support to generate these instructions inthe TCG run-time to reduce the consistency overhead in MTTCG. You have to usethe memory access auxiliary info tags to generate appropriate fences on thehost architecture unlike the current situation, where only explicit guestfence instructions are translated.
Further Reading:
- Richard Henderson's email on how to improve TCG performance
- QEMU internals presentation
- TCG documentation
- The kernel has a detailed guide to memory barriers
Requirements: Working on this will require the student to develop a goodunderstanding of the internals of tiny code generator (TCG) in QEMU. Anunderstanding of compiler theory or previous knowledge of the TCG would alsobe beneficial to this work. Finally familiarity with GIT and being able tofrequently re-base work on upstream master branch would be useful.
Details:
- Skill level: intermediate
- Language: C
- Mentor: Alex Bennée <[email protected]> (stsquad on IRC)
- Suggested by: Pranith Kumar, Alex Bennée, and Richard Henderson
Project idea template
Applicants are welcome to propose their own project ideas. The process is as follows:
- Email your project idea to [email protected]. CC Stefan Hajnoczi <[email protected]> and regular QEMU contributors who you think might be interested in mentoring.
- If a mentor is willing to take on the project idea, work with them to fill out the 'Project idea template' above and email Stefan Hajnoczi <[email protected]>.
- Stefan will add the project idea to the wiki.
Note that other candidates can apply for newly added project ideas. This ensures that custom project ideas are fair and open.
See what people are developing and talking about on the mailing lists:
Grab the source code or browse it:
Build QEMU and run it: QEMU on Linux Hosts
Mentors are responsible for keeping in touch with their student and assessing the student's progress. GSoC has a mid-term evaluation and a final evaluation where both the mentor and student assess each other.
The mentor typically gives advice, reviews the student's code, and has regular communication with the student to ensure progress is being made.
Being a mentor is a significant time commitment, plan for 5 hours per week. Make sure you can make this commitment because backing out during the summer will affect the student's experience.
The mentor chooses their student by reviewing student application forms and conducting IRC interviews with candidates. Depending on the number of candidates, this can be time-consuming in itself. Choosing the right student is critical so that both the mentor and the student can have a successful experience.
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